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Cisco Systems, Inc. is seeking an ASIC Implementation Technical Lead focused on Design-for-Test (DFT) within the Silicon One group. You will collaborate with Front-end RTL and Backend physical design teams to define DFT requirements early in the design cycle and contribute to post-silicon validation. You will lead the DFT and quality processes across the Implementation flow, work with ATE engineers on pattern translation, and help shape next‑generation networking chips in a fast‑paced, global

Also on the board Same function, level within a rung

Level

Lead

Location

San Jose, CA

Occupation

Computer Hardware Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

2 days ago

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