Micron Technology, Inc. seeks an experienced SoC DFT architect to own design-for-test hardware and verify testability across the RTL-to-GDS flow. You will implement scan, MBIST/LBIST, JTAG, and ATPG concepts while coordinating with RTL, synthesis, STA, and physical design teams. This role emphasizes collaboration with CAD and verification to enable smooth pre-silicon debug and post-silicon bring-up.

Also on the board Same function, level within a rung

Level

Lead

Location

Brooklyn, NY

Occupation

Computer Hardware Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

yesterday

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