cisco systemsSan Jose, CA
Lead ASIC Architect – High-Performance AI Chips (Hybrid)
Lead ASIC Architect – High-Performance AI Chips (Hybrid)
Lead ASIC Architect – High-Performance AI Chips (Hybrid)
cisco systemsSan Jose, CA
today
Computer Systems Engineers/ArchitectsComputer Hardware EngineersComputer and Information Systems Managers
Semiconductor and Related Device ManufacturingComputer Systems Design ServicesElectronic Computer Manufacturing
Apply for this role (opens in a new tab)Cisco Systems, Inc. is seeking a senior ASIC verification engineer to drive the definition, architecture and verification of high-performance ASICs in a San Jose environment. The role involves owning multiple functional areas, developing reusable code, and debugging across ASIC, software, and hardware levels. The candidate will lead DV work, define new verification methodologies, and collaborate with ASIC and apps teams to resolve architectural issues, while contributing to lab bring-up and
Also on the board Same function, level within a rung
Level
Lead
Location
San Jose, CA
Occupation
Computer Systems Engineers/Architects
Industry
Semiconductor and Related Device Manufacturing
Posted
today