SiMa.ai in San Jose, CA is seeking a Principal Engineer, AI & ML Design Verification to lead MLA verification efforts and develop test benches using UVM and SystemVerilog. Responsibilities include architecture discussions, test plan execution, debugging, and collaboration with architecture, SoC hardware, and software teams. Requires 12+ years in pipeline-based verification and AMBA/SVA knowledge.

Also on the board Same function, level within a rung

Level

Lead

Location

San Jose, CA

Occupation

Validation Engineers

Industry

Computer Systems Design Services

Posted

today

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