us health partnersBrooklyn, NY
Senior ASIC Formal Verification Engineer
Senior ASIC Formal Verification Engineer
Senior ASIC Formal Verification Engineer
us health partnersBrooklyn, NY
today
Semiconductor and Related Device ManufacturingElectronic Computer ManufacturingSemiconductor Machinery Manufacturing
Apply for this role →Etched seeks a Formal Verification Engineer to advance verification across ASIC DV, interface IP, and SoC subsystems powering our ASICs. You will drive formal properties, enable proof convergence, and collaborate with architects, RTL designers, DV, emulation, software and firmware teams to prove design correctness and minimize corner-case bugs.
Expect to build reusable formal environments, employ SystemVerilog Assertions, and align verification with simulation and regression.
Also on the board Same function, level within a rung
Level
Lead
Location
Brooklyn, NY
Occupation
Computer Hardware Engineers
Industry
Semiconductor and Related Device Manufacturing
Posted
today