Senior ASIC Timing Engineer — Equity + High-Impact Innovation
Senior ASIC Timing Engineer — Equity + High-Impact Innovation
googleSunnyvale, CA
yesterday
Computer Hardware EngineersTiming Device Assemblers and AdjustersElectronics Engineers, Except Computer
Semiconductor and Related Device ManufacturingOther Electronic Component ManufacturingElectronic Computer Manufacturing
Apply for this role →Google Sunnyvale, CA, USA is seeking a Static Timing Engineer to lead the timing closure for high-performance compute ASICs. You will develop constraints, automate timing flows, and collaborate with architecture, logic design, and DFT teams to meet tight performance and power goals.
You will work on advanced technology nodes, develop methodologies, and evaluate vendors/tools. In-person interviews are typically required as part of the hiring process.
Also on the board Same function, level within a rung
Level
Lead
Location
Sunnyvale, CA
Occupation
Computer Hardware Engineers
Industry
Semiconductor and Related Device Manufacturing
Posted
yesterday