sambanovaSan Jose, CA
Senior RTL Design Engineer for AI Accelerator ASIC
Senior RTL Design Engineer for AI Accelerator ASIC
Senior RTL Design Engineer for AI Accelerator ASIC
sambanovaSan Jose, CA
today
Computer Hardware EngineersElectronics Engineers, Except ComputerComputer and Information Research Scientists
Semiconductor and Related Device ManufacturingSemiconductor Machinery ManufacturingResearch and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology)
Apply for this role →SambaNova RTL Design Engineers build blocks of the Reconfigurable Dataflow Unit (RDU) ASICs behind our AI acceleration systems. You’ll own blocks within a larger subsystem, contribute sections of the microarchitecture, write and debug RTL, and carry your blocks through implementation, tape-out, and silicon bring-up.
You’ll work with principal engineers, design verification, and physical design teams, taking on larger blocks as you deepen architectural depth.
Also on the board Same function, level within a rung
Level
Lead
Location
San Jose, CA
Occupation
Computer Hardware Engineers
Industry
Semiconductor and Related Device Manufacturing
Posted
today