Renesas Electronics Corp. is seeking a Principal Design Verification Engineer to provide technical leadership for verification of next-generation memory interface products, including data buffer silicon. You will drive verification strategy and execution for complex digital designs, collaborating with RTL and design teams to ensure functionality, performance, and product requirements are met. The ideal candidate brings deep semiconductor verification expertise with System Verilog and UVM, with

Also on the board Same function, level within a rung

Level

Manager

Location

Phoenix, AZ

Occupation

Computer Hardware Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

yesterday

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Senior Verification Architect - DDR6 & SystemVerilog at renesas...