Renesas Electronics, based in San Jose, is seeking a Principal Package Design Engineer to lead advanced packaging development for high-performance semiconductors. You will own architecture definition, reliability, and cross-functional collaboration with design, substrate, and manufacturing teams. The role requires 5+ years in semiconductor packaging, MSc/PhD preferred, and hands-on experience with Cadence Allegro, ANSYS, and other design tools.

Also on the board Same function, level within a rung

Level

Lead

Location

San Jose, CA

Occupation

Electronics Engineers, Except Computer

Industry

Semiconductor and Related Device Manufacturing

Posted

yesterday

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