7Rays Semiconductors in San Jose, California, is seeking a Senior/Staff Physical Design Engineer with deep expertise in top-level clock architecture and CTS implementation for advanced-node SoCs (5nm / 3nm / 2nm). The ideal candidate will have strong experience in designing large-scale clock distribution networks while collaborating with various teams to ensure robust clock quality and tapeout readiness.

Also on the board Same function, level within a rung

Level

Lead

Location

San Jose, CA

Occupation

Computer Hardware Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

yesterday

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