Etched is building a new category of AI hardware: frontier inference clusters. As a Physical Design Engineer, you will own block-level implementation from synthesis through GDSII sign-off and drive Block-level PPA optimization, collaborating closely with RTL designers to iterate rapidly and bring our products to market. You will lead floorplanning, placement, clock tree synthesis, routing, timing closure, and sign-off across EM, IR drop, RC extraction, and antenna analysis, while supervising

Also on the board Same function, level within a rung

Level

Lead

Location

San Jose, CA

Occupation

Computer Hardware Engineers

Industry

Electronic Computer Manufacturing

Posted

yesterday

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