Design Verification Lead - Must be local to TX,CA or MA

Duration: 12+ Months Contract

Location: Austin, TX / Bay area, CA / Boston, MA | Onsite Role

Job Description: We are looking for a skilled Design Verification Engineer to ensure the robustness and functionality of our next-generation digital designs. You will be responsible for "breaking" the design by creating sophisticated test environments, identifying critical bugs before tape-out, and ensuring 100% functional coverage. Responsibilities Verification Planning: Develop detailed test plans based on architectural specifications to identify all likely points of failure. Testbench Development: Build and maintain scalable, reusable verification environments from scratch using SystemVerilog and UVM (Universal Verification Methodology). Test Case Creation: Write directed and constrained-random test cases to cover corner scenarios and ensure design completeness. Coverage Closure: Define and implement functional and code coverage models; analyze reports to identify and close coverage holes. Debug & Analysis: Use waveform tools (e.g., Verdi, DVE) to debug simulation failures and collaborate with RTL designers to resolve root causes. Formal Verification: (Optional/Senior) Apply formal tools to prove design properties and catch complex bugs that simulation might miss. Automation: Develop scripts (Python, Perl, or Shell) to automate regression runs and result parsing. Required Skills & Qualifications Education: Bachelor’s or Master’s degree in Electrical, Electronics, or Computer Engineering.

Experience: [X]+ years of hands-on experience in digital design verification. HDLs: Proficiency in SystemVerilog and basic knowledge of Verilog/VHDL. Methodologies: Expert-level knowledge of UVM or OVM. Protocols: Familiarity with standard interfaces like AMBA (AXI/AHB/APB), PCIe, USB, or Ethernet.

Tools: Proficiency with industry-standard simulators such as VCS, Questa, or Xcelium.

Soft Skills: Strong analytical thinking, attention to detail, and the ability to work in a cross-functional team. Preferred/Bonus Skills Experience with low-power verification (UPF/CPF). Knowledge of C/C++ or SystemC for hardware/software co-verification. Exposure to emulation platforms like Palladium or Veloce.