Astera Labs in the United States seeks a Principal Engineer in Hardware Engineering's Validation Engineering to define and lead validation strategies for next-generation connectivity products. You will translate complex silicon, board, and system requirements into rigorous plans, scalable automation, and clear release decisions—ensuring reliable performance in AI infrastructure. This role blends hands-on technical leadership with broad cross-functional influence, partnering with design,

Also on the board Same function, level within a rung

Level

Lead

Location

San Jose, CA

Occupation

Computer Hardware Engineers

Industry

Computer Terminal and Other Computer Peripheral Equipment Manufacturing

Posted

today

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