Lead Physical Design Engineer: RTL-to-GDS for Low-Power SoCs

Innophase IoT seeks a Senior Physical Design Principal Engineer to own the RTL-to-GDS flow for a low-power SoC, including floorplanning, place & route, CTS, STA, and signoff. You will join a team pushing architectural feasibility for a fabless wireless semiconductor platform. The role focuses on power integrity, timing, and verification across multiple projects, reporting into the SOC group, with locations in San Diego or San Jose, CA.