Google Sunnyvale, CA is seeking a mid-level RTL Design Engineer to shape AI/ML hardware accelerators. You will work on TPU architecture, verify complex digital designs, and collaborate with software teams to deliver high-performance AI workloads. Requirements include a Bachelor's in EE/CE/CS, 4 years of custom silicon design, RTL design with Verilog/SystemVerilog, and a strong systems mindset. Preferred candidates have advanced degrees and experience in high-performance, low-power design

Also on the board Same function, level within a rung

Level

Lead

Location

Sunnyvale, CA

Occupation

Computer Hardware Engineers

Industry

Electronic Computer Manufacturing

Posted

today

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