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Annapurna Labs (U.S.) Inc. within AWS is seeking a Package Layout Design Engineer to advance IC packaging for AI/ML hardware. You will handle floor planning through tape-out, collaborating with SI/PI, thermal, and manufacturing to meet performance targets. Role requires hands-on experience with package layout tools and a deep understanding of 2.5D/3D-IC, RDL, TSV, and interposer technologies. Great communication and teamwork are essential.

Also on the board Same function, level within a rung

Level

Senior

Location

Tempe, AZ

Occupation

Computer Hardware Engineers

Industry

Printed Circuit Assembly (Electronic Assembly) Manufacturing

Posted

10 days ago

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