Senior Static Timing Engineer – ASIC Timing & Automation
Senior Static Timing Engineer – ASIC Timing & Automation
engineeringjobsnetMontana, WI
yesterday
Computer Hardware EngineersElectronics Engineers, Except ComputerTiming Device Assemblers and Adjusters
Semiconductor and Related Device ManufacturingOther Electronic Component ManufacturingElectronic Computer Manufacturing
Apply for this role →Google is seeking a Senior Static Timing Engineer in Sunnyvale, CA, to lead the physical implementation of high-performance ASICs. You will develop constraints, validate timing, and drive timing closure for large compute chips, collaborating with architecture, logic, and DFT teams.
The role requires hands-on STA expertise, scripting in Tcl/Perl/Python, and evaluating tools and vendors to ensure robust sign-off across complex design flows.
Also on the board Same function, level within a rung
Level
Lead
Location
Montana, WI
Occupation
Computer Hardware Engineers
Industry
Semiconductor and Related Device Manufacturing
Posted
yesterday