Jariet Technologies, Inc., a Cesium Astro subsidiary, seeks a principal ASIC functional verification engineer in the United States. You will design and implement verification test benches for high-speed digital SoCs, using System Verilog, UVM, and coverage-driven methods to ensure first-pass silicon quality. The role may involve team leadership and close collaboration with the VLSI design team to plan verification strategies and drive project success.

Also on the board Same function, level within a rung

Level

Lead

Location

Aliso Viejo, CA

Occupation

Validation Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

yesterday

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