insight globalSan Jose, CA
Senior ASIC/SoC Verification Engineer UVM, SystemVerilog
Senior ASIC/SoC Verification Engineer UVM, SystemVerilog
Senior ASIC/SoC Verification Engineer UVM, SystemVerilog
insight globalSan Jose, CA
yesterday
Semiconductor and Related Device ManufacturingSemiconductor Machinery ManufacturingComputer Systems Design Services
Apply for this role (opens in a new tab)Insight Global seeks a Design Verification Engineer to join Cisco's silicon one group in San Jose, CA. You will develop UVM-based verification environments and create comprehensive verification plans across block and system levels.
You’ll design assertions, traffic generators, agents and scoreboards, collaborate with cross-functional teams to assess testability, and lead debugging efforts for complex challenges.
Also on the board Same function, level within a rung
Level
Lead
Location
San Jose, CA
Occupation
Validation Engineers
Industry
Semiconductor and Related Device Manufacturing
Posted
yesterday