Teradyne’s Memory Tester Business Unit seeks a senior hardware architect to own system and board level designs for high-performance testers. You will lead end-to-end hardware development from concept through production, shaping architectures for multi-board systems deployed worldwide. The role requires deep expertise in high-speed digital, analog, power, FPGA and ASIC designs, plus strong leadership and mentoring of engineers across geographically dispersed teams.

Also on the board Same function, level within a rung

Level

Lead

Location

San Jose, CA

Occupation

Computer Hardware Engineers

Industry

Electronic Computer Manufacturing

Posted

yesterday

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