Senior/Principal Hardware Engineer – High-Speed RF / Signal Integrity (On-site)

Role Summary: We are looking for a Senior or Principal Hardware Engineer to own the high-speed electrical implementation and signal-integrity validation of next-generation optical interconnect hardware. This role is highly hands-on and focused on the RF and signal-integrity implementation of next-generation optical interconnect hardware. The engineer will work closely with internal photonics, systems, packaging, and test teams to translate system-level requirements into robust high-speed electrical interfaces and hardware, then carry those designs through simulation, fabrication, bring-up, characterization, and qualification. The role will also serve as a key technical interface to OSATs, substrate and PCB vendors, connector suppliers, and high-speed component partners.

Responsibilities: Design high-speed PCBs and contribute to substrate/SLP electrical interface definition for >100 GBaud-class signaling. Work with OSATs and substrate vendors on SLP stack-up, routing constraints, bump interfaces, manufacturability, and high-speed electrical performance. Own the architecture and implementation of high-speed electrical interfaces and RF hardware for optical interconnect systems. Perform pre-layout and post-layout SI analysis using S-parameters, channel simulation, and electromagnetic simulation as appropriate. Define high-speed interfaces between test equipment, MZM drivers, TIAs, photonic modules, and host electronics. Work closely with photonics, package, systems, and test engineers to optimize electrical/optical co-design. Lead high-speed board bring-up, debug, characterization, and failure analysis. Define and execute qualification plans for high-speed PCB and substrate interfaces, including insertion loss, return loss, crosstalk, impedance, skew, and signal-quality validation.

Qualifications: B.S., M.S., or Ph.D. in Electrical Engineering or related field. Significant industry experience in high-speed hardware and signal-integrity design. Strong background in signal integrity for multi-tens-of-GHz electrical interfaces. Experience designing and bringing up high-speed PCBs using low-loss or hybrid RF stack-ups. Deep understanding of differential signaling, transmission lines, impedance control, reflections, loss, crosstalk, and power integrity. Experience with S-parameters, VNA measurements, oscilloscopes, high-speed pattern generators/BERTs, and related RF test equipment. Experience with one or more SI/EM tools such as Ansys HFSS/SIwave, Cadence Sigrity, or equivalent. Comfortable working hands-on in the lab and debugging first-of-kind hardware. Able to make technical decisions with incomplete information and rapidly converge toward a working system.

Preferred: Experience with optical transceivers, silicon photonics, linear-drive optics, or SerDes interfaces. Experience with 50 GBaud or >100 GBaud PAM4 electrical links. Experience integrating linear MZM drivers and TIAs. Familiarity with IEEE 802.3, OIF CEI, or related datacom standards.