Senior SoC/ASIC Physical Design Architect

A leading semiconductor design firm is seeking a Senior SoC/ASIC Physical Design Engineer in Irvine, California. The role involves driving physical design activities to closure while collaborating with RTL and engineering teams. Requirements include a Bachelor’s degree (Master’s preferred) and at least 10 years of experience in ASIC/SoC physical design with expertise in EDA tools. You will focus on optimizing performance, power, and area while leading design closure activities. Competitive salary and benefits offered.