anysiliconCupertino, CA
ASIC Design and Integration Engineer – Silicon Security
ASIC Design and Integration Engineer – Silicon Security
ASIC Design and Integration Engineer – Silicon Security
anysiliconCupertino, CA
today
Electronics Engineers, Except ComputerComputer Hardware EngineersComputer Systems Engineers/Architects
Semiconductor and Related Device ManufacturingComputer Systems Design ServicesElectronic Computer Manufacturing
Apply for this role →ASIC Design and Integration Engineer – Silicon Security
Apple's Silicon Security team is seeking an ASIC Design Engineer to develop secure subsystems that safeguard the Apple SoC. This role involves designing advanced hardware defenses against side channel attacks, ensuring the protection of sensitive customer data across Apple products.
Responsibilities:
Architect and design cutting-edge security features in collaboration with Platform Architecture and Design Verification teams.
Integrate security IPs into secure subsystems, ensuring compliance with timing, performance, and security standards.
Resolve integration issues across multiple IP blocks and coordinate with IP owners regarding interface and functionality.
Drive front-end quality flows from RTL to netlist, including hands-on work with Lint, CDC/RDC analysis, UPF development, timing, and synthesis.
Utilize AI-assisted tools to improve design quality and productivity.
Qualifications:
BS in Electrical Engineering, Computer Engineering, or a relevant field.0 years of experience.
Skills: RTL design experience using Verilog or System
Verilog. Experience with CDC and RDC analysis and verification. Familiarity with low-power design techniques and UPF.Solid understanding of digital design fundamentals including synthesis, timing closure, and design for testability. Background in cryptography and cryptographic algorithm implementation. Knowledge of hardware security concepts including key management and physical attack countermeasures. Experience with clock and reset architecture at the subsystem level. Strong knowledge of AMBA bus protocols (AXI, AHB, APB).ASIC Design ServicesVerificationPackaging & WaferSemiconductor IPFind the Right Semiconductor PartnerASIC Design ServicesVerificationPackaging & WaferSemiconductor IPWork EmailFree No obligation Response within 24 hours
Also on the board Same function, level within a rung
Level
Lead
Location
Cupertino, CA
Occupation
Electronics Engineers, Except Computer
Industry
Semiconductor and Related Device Manufacturing
Posted
today