amdSanta Clara, CA
Senior Memory PHY Architect — Lead High‑Speed I/O & SoCs
Senior Memory PHY Architect — Lead High‑Speed I/O & SoCs
Senior Memory PHY Architect — Lead High‑Speed I/O & SoCs
amdSanta Clara, CA
yesterday
Computer Hardware EngineersArchitectural and Engineering ManagersElectronics Engineers, Except Computer
Semiconductor and Related Device ManufacturingOther Electronic Component ManufacturingPrinted Circuit Assembly (Electronic Assembly) Manufacturing
Apply for this role →A leading semiconductor company is seeking a Senior Technical Leader to shape Memory PHY technology. You will drive architectural direction and technical decisions for cutting-edge designs in mixed-signal circuits and influence critical project outcomes. Ideal candidates will have over 15 years’ experience in analog and mixed-signal design, especially in high-speed technologies. Join a collaborative team that values deep technical ownership and innovation, while shaping the future of computing architecture.
Also on the board Same function, level within a rung
Level
Manager
Location
Santa Clara, CA
Occupation
Computer Hardware Engineers
Industry
Semiconductor and Related Device Manufacturing
Posted
yesterday